Automotive IC suppliers are expected to ship devices with zero PPM (zero failure per million devices) to the system manufacturers with sustainable yield. Yield is the key performance indicator measuring the cost structure of the semiconductor fabrication process. Semiconductor yield modeling which is a complicated task, is related to identifying process issues, improving quality and adhering to the market quality field performance request. It is a complicated process because it is difficult to link any internal process improvement and PPM level due to elapsed time, different magnitude and not easy to access the field data. Therefore, any economic analysis of balancing the cost of improvement versus the benefit is seen usually as weak if not impossible. This paper address a specific improvement action but the methodology can be applied broadly. This paper presents modeling strategies based on the rejection of visual defects methodology. Through data consolidation and analysis, the key achievement is to be able to validate data with the theoretical model and also to understand the correlation among the main factors that affect the yield. Hence the efficiency and the effectiveness of testing process become predictable. Therefore, analysis and evaluation of the impact on reliability and cost effectiveness could be made possible.