2019 IEEE European Test Symposium (ETS)

4 / 2018-12-12 06:42:11

Test and Reliability Analysis of Approximate Reversible Circuits

Design for test, Fault models, Approximation, Reversible circuits,Fault Injection

Reversible logic has gained interest of researchers worldwide for its ultra-low power and high speed computing abilities in the future quantum information processing. Testing of these circuits is important for ensuring high reliability of their operation. In this work, we propose an ATPG methodology for reversible circuits using an inexact approach to generate CTS (Complete Test Set) which can detect single stuck-at faults, multiple stuck-at faults, repeated gate fault, partial and complete missing gate faults which are very useful logical fault models for reversible logic to model any physical defect. The proposed methodology uses a hierarchical approach that can be used to test a reversible circuit designed with k-CNOT, Peres and Fredkin gates.