The 15th IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC)

356 / 2019-03-07 23:33:56

A 56-Gb/s PAM4 Variable Gain Amplifier in 40-nm CMOS Technology

VGA,inverter-based TIA,inductive peaking,variable inductor

Plenary track > Analog Circuits

This work presents a 56-Gb/s PAM4 variable gain amplifier (VGA) in 40-nm CMOS process. The proposed implementation achieves a wide bandwidth of 29 GHz by utilizing an inverter-based transimpedance amplifier (TIA) stage and inductive peaking technology. In order to effectively conduct the 7.2-dB variable gain tuning range, a 5-bit control network is applied. The total power consumption is 7.4-mW from a 1-V supply.