7th International Conference on Electric Power Equipment– Switching Technology (ICEPE 2024)

DC fault interruption technology is essential for the protection and mitigation of current faults in modern power grid; the DC Circuit Breaker (DC CB) being the core component of such protection systems. One of the prime step in validating and demonstrating technical feasibility of a DC CB topology is prototyping and testing it under quasi-grid-like conditions. In this article, an LVDC (500kV/0.3kA) testbed has been proposed which could mimic the necessary current/voltage stress across the DC interrupter under consideration. An artificial current fault is generated using a capacitor bank, energized through a rectifier and chopper circuit. Before fault instigation, the voltage across the DC CB is kept 15-18% higher, which drops to rated DC CB voltage after DC CB interrupts the fault to execute appropriate dielectric stress across it. A simplified control mechanism has been made and Simulated in PSCAD/EMTDC software, which validates the working principle of the test-bed model.