Presentation Details
Noise-Aware Design of Quantum Counters Using Qiskit and IBM Quantum Processors
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Start Time：2026-07-30 12:55（Asia/Kolkata）
Duration：15min
Session：S5 Quantum Communications »
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Abstract
Quantum computing is revealing itself as a deeply promising computational model, especially
for those problems that are so complex that even classical computers find them difficult.
Nevertheless, quantum processors that are commercially or publicly accessible right now are
still within what's called the Noisy Intermediate-Scale Quantum (NISQ) era. In this era, various
aspects such as decoherence, gate errors, crosstalk, and inaccuracies in measurement
substantially lead to the loss of reliability in quantum computation. This paper explores the
design, simulation, and efficient implementation of noise-aware quantum counters that are
scalable through the use of the Qiskit Software Development Kit (SDK) and IBM Quantum
processors. This paper proposes architectures of 2, 3, 4, and 5-bit quantum counters built on
reversible quantum gates such as Pauli-X, Controlled-NOT (CNOT), Toffoli (CCNOT), and
Multi-Controlled X (MCX) gates. Initially, the circuits were tested through Qiskit Aer
simulators in an ideal environment and lastly run on IBM Quantum hardware to see how
realistic quantum noise would impact them. Furthermore, the paper investigates several noise
reduction methods, including measurement error mitigation, transpiler optimization, and
designing a circuit that is aware of noise. Based on experiments, it is clear that perfectly
simulated environments provide sequences of counting that are very precise and of high
fidelity, whereas the quantum computers' hardware that we have today shows performance that
is running down due to noise and the complexity of the circuits. Besides, the study processing
reveals that quantum computers of higher order suffer more from errors because they have
greater depth of circuits and they significantly depend on multi-qubit gate operations. The
published results highlight the critical role of optimization strategies that account for noise in
improving the fidelity, reliability, and scalability of quantum sequential circuits. This research
advances the development of more efficient quantum counter architectures and provides
valuable insights into the actual implementation of scalable quantum systems on currently
available NISQ hardware and future fault-tolerant quantum computing platforms.
Keywords
Quantum Computing, Quantum Counter, Qiskit, IBM Quantum, Noise Mitigation, Quantum Circuits, NISQ Devices, Quantum Ga
Speaker
Mahesh Eegala
M.Tech Student Rama chandra college of engineering eluruSubmission Author
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Important Date
-
Conference Date
Jul 30
2026
toAug 01
2026
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Jul 28 2026
Registration deadline
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Jul 30 2026
Draft paper submission deadline
Sponsored By
The United Societies of Science
Organized By
Kongunadu College of Engineering and Technology
Supported By
IEEE Section
IEEE Madras Section
IEEE Madras Section
Contact Information
Previous Conferences
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2026-07-30 India Trichy
2026 International Conference on Networks Computers and Communications
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