2017 2nd Joint International Mechanical, Electronic and Information Technology Conference (JIMET 2017)

34 / 2017-02-27 19:38:37

Improved Digital Watermarking Method and Realization Based on FPGA

watermarking，Pixel-value-ordering，Block selection，FPGA，Verilog HDL

This paper presents a new digital watermarking method,which major improvement method realised based on single-chip FPGA. The procedure includes dividing the input digital image by block, block selection, sorting the pixel values within the blocks,The data is embedded by using new difference and new histogram-modification-strategy. The definition of new difference takes the position of maximum and the second large value pixel into account.Which is help for the blocks,in which maximum value equal to the second largest pixel.This algorithm can use these pixel blocks to embed data. The key algorithm is based on the FPGA(Field Programmable Gata Array), using Verilog HDL language and graphical input method to design on the Quartus Ⅱ 13.0 software platform. And the processed pixel value will be passed to the computer, providing experimental data for analysis andcomparative.