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〔CLOSED〕
Introduction

The International Design and Test Symposium is an IEEE-sponsored technical event devoted to exploring emerging challenges and novel concepts related to the design, test, automation, and reliability of electronic systems ranging from integrated circuits through multi-chip modules and printed circuit boards to full systems. IDT is a unique forum to discuss best practices and novel ideas in design methods, tools, test, and reliability in the Middle East and Africa (MEA) region. The Symposium is initiated by and in affiliation with the IEEE TTTC (Test Technology Technical Council) and the 2017 edition is organized by Kuwait University (KU). It is also technically sponsored by IEEE CEDA (Council on Electronic Design Automation). 

The IDT moves around the countries of the MEA region, making the member countries benefit equally to the fullest extent. This year, IDT will be held in Kuwait. Kuwait is known of its support to advancing research in the region.

Call for paper

Important date

1970-01-01 00:00:00
Abstract submission deadline
1970-01-01 00:00:00
Abstract notification of acceptance
1970-01-01 00:00:00
Draft paper submission deadline
1970-01-01 00:00:00
Draft paper acceptance notification
2017-09-29
Final paper submission deadline

Submission Topics

Topics include, but are not limited to, the following:

Design Methods and Tools:

  • IP and SOC Design

  • Multiprocessor/Multi-core Systems

  • Embedded Systems

  • DFX

  • Analog, Mixed Signal and RF Design

  • High Speed Circuits Design

  • Design of MEMS and MOEMS 

  • Low Voltage and Low Power systems

  • Innovative Technologies

  • Real Time Systems 

  • Simulation, Validation & Verification

  • System Specification and Modeling

  • Formal Methods and Verification

  • System Design/Synthesis/Optimization

Test and Reliability:

  • Automotive Reliability & Test

  • IP and SOC Testing

  • Multiprocessor/Multi-Core Systems Test

  • Memory & FPGA Test & Repair

  • Internet of Things Test

  • High Speed, Analog, Mixed Signal & RF Testing

  • MEMS/MOEMS Testing 

  • Defect and Fault Modeling

  • DFT, BIST and BISR

  • On-line Testing / Fault Tolerance

  • Fault Simulation, ATPG

  • Reliability Failures/ Modeling

  • Circuit Reliability

  • Electronic System Reliability

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Important Date
  • Conference Date

    Dec 17

    2017

    to

    Dec 19

    2017

  • Sep 29 2017

    Final Paper Deadline

  • Dec 19 2017

    Registration deadline

Contact Information