Description

The SISSAD conference series provides an open forum for the presentation of the latest results and trends in process and device simulation. The conference is the leading forum for Technology Computer-Aided Design (TCAD) and is held alternatingly in the United States, Japan, and Europe in September. [source: http://www.sispad.info/]

Call for paper

Important Dates

Draft paper acceptance notification:2018-06-11

Abstract submission deadline:2018-04-20

Final paper submission deadline:2018-07-16

Call for paper description

Scope
The SISPAD conference series provides an open forum for the presentation of the latest results and trends in process and device simulation. The conference is the leading forum for Technology Computer-Aided Design (TCAD) and is held alternatingly in the United States, Japan, and Europe in September. [source: http://www.sispad.info/]
 
Topics
Original contributions are solicited on topics that include but are not limited to:

  • Modeling and simulation of established semiconductor device, including FinFETs, GAA FETs, ultra-thin SOI devices, optoelectronic devices, TFTs, sensors, power electronic devices, and organic electronic devices.
  • Modeling and simulation of emerging devices including tunnel FETs, SETs, spintronic devices, straintronic devices, bio-electronic devices, and new material-based devices for various applications
  • Modeling and simulation of interconnects, including noise and parasitic effects
  • Modeling and simulation of all sorts of semiconductor processes, including first principles material design, and growth simulation of nano-scale fabrication
  • Advances in fundamental aspects of device modeling and simulation, including of charge, spin, and thermal transport, of collective states including spin/magnetic and charge, and of fluctuation, noise, and reliability.
  • Numerical methods and algorithms, including grid generation, user-interface, and visualization
  • Compact modeling for circuit simulation, including low-power, high frequency, and power electronics applications
  • Process/device/circuit co-simulation in context with system design and verification, including for emerging devices
  • Modeling and simulation of equipment, topography, lithography
  • Benchmarking, calibration, and verification of simulators

Author guidelines

Abstract Formatting and transmission requirements

  • Contributed abstracts are limited to two pages total including tables and figures, but acknowledgments and references included at the end may extend onto a 3rd page.
  • The text of the abstract should begin with a very brief description of subject, relevance and most important qualitative results.
  • Pages must be either ASI LETTER (8.5 in x 11.0 in) with 1 in margins all around, or 4A size (21.0 cm x 29.7 cm) with 2.5 cm margins all around. Font size in the body of the abstract should be at least 10 pt.  And figures, tables and their captions must remain legible.  Otherwise, there are no specific layout requirements (nor templates) for the abstracts.  (Subsequent final papers for inclusion in the proceedings will be subject to more detailed requirements using templates.)
  • Abstracts must be submitted in PDF format
  • Name the abstract file according to the first author's name and affiliation and, in the case of multiple submissions from the same first author, an Arabic number.  If it is an updated version of a previously submitted abstract, add "updated" to the end of the file name. For example, "Leonard F Register_ECE_U Texas Austin_2_updated"
  • Abstract file size must be no larger than 10MB. Abstract must be uploaded below: abstracts sent by e-mail or postal mail will not be considered without special permission.
  • Provide comments as needed in the space provided. For example, if you prefer a poster presentation or will only accept an oral presentation, please indicate so.

Committee

 General Chair
Leonard Franklin Register (University of Texas at Austin, USA)
 
Technical Program Chair
Victor Moroz (Synopsys, USA)
 
Honorary Committee
Robert Dutton (Stanford University, USA)
Siegfried Selberherr (TU Wien, Austria)
Kenji Taniguchi (Osaka University, Japan)
 
International Steering Committee
Yoshinari Kamakura (Osaka, Univ., Japan)
David. Esseni (Univ. of Udine, Italy)
Leonard F. Register (Univ. of Udine, Italy)
Kenichiro Sonoda (Renesas, Japan)
Jurgen Lorenz (Fraunhofer IISB, Germany)
Neil Goldsman (Univ. of Maryland, USA)
Nobuya Mori (Osaka Univ., Japan)
Asen Asenov (Univ. of Glasgow, UK)
Valery Axelrad (Sequoia Design Systems, USA)

Technical Program Committee
Supriyo Bandyopadhyay (Virginia Commonwealth University, USA)
Atashi Basu (Lam Research Corp., USA)
Daniel Connelly (Consultant, USA)
Ray Duffy (Tyndall National Institute, Ireland)
Geert Eneman (IMEC, Belgium)
Tibor Grasser (Vienna University of Technology, Austria)
Sumeet Gupta (Purdue University, USA)
Sayed Hasan (Intel Corporation, USA)
Akira Hiroki (Kyoto Institute of Technology, Japan)
Seong-Dong Kim (SK Hynix, Inc., Korea)
Uihui Kwon (Samsung Electronics, Korea)
Yiming Li (National Chiao Tung University, Taiwan)
Juergen Lorenz (Fraunhofer Institute for Integrated Systems and Device Technology IISB, Germany)
Blanka Magyari-Kope (Stanford University, USA)
Kazuya Matsuzawa (Toshiba, Japan)
Chandra Mouli (Micron Technology Inc., USA)
Sudarshan Narayanan (GLOBALFOUNDRIES, USA)
Phil Oldiges (IBM, USA)
Pierpaolo Palestri (University of Udine, Italy)
Denis Rideau (STMicroelectronics, Inc., France)
Atsushi Sakai (Renesas Electronics Corporation, Japan)
Sayeef Salahuddin (University of California at Berkeley, USA)
Andreas Schenk (ETH Zurich, Switzerland)
William Vandenberghe (University of Texas at Dallas, USA)
Jeff Wu (TSMC, Taiwan)

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Contact information

  • Leonard Register
  • register@austin.utexas.edu
  • +1 512-567-3748

Sponsored By

  • IEEE Electron Devices Society

Organized By

  • University of Texas at Austin