As a fundamental building block of large area electronics, thin-film transistor (TFT) technology has enjoyed an exciting era of research and development in the past decades. Its dominant application-flat panel active matrix display has grown to be a multi-billion-dollar business that keeps growing. In addition to TFTs in amorphous- and polycrystalline-silicon, newly emerging organic, metal oxide and nano-composite semiconductor TFT technologies are becoming increasingly popular. Solution/printing based TFT technologies are also attracting great attention from both academia and industry.
These new technologies are needed to meet the growing demands for displays of better quality, lower cost and greener manufacturing, and being thin and flexible. Moreover, the applications of TFTs have been extended from the pixel switching to more complex electronic functions for sensing, imaging, signal communication, processing and data storage on glass, plastic or fabrics substrates, which will enable a lowcost and flexible design solution to usher the age of pervasive electronics, IOTs and artificial intelligence. Therefore, development of computer-aided design (CAD) techniques at all levels becomes more and more critical for the TFT community to bridge the gap between new material/device technologies and implementation of functional systems.
IEEE CAD-TFT is the conference dedicated to CAD techniques on TFT technologies for displays, sensors and general large area, flexible and printed electronics. CAD-TFT 2018 follows 2017 CAD-TFT workshop in Cambridge, CAD-TFT 2016 in Beijing, CAD-TFT 2014 in Nanjing, and the previous meetings (International Workshop on Compact Thin-Film Transistor Modeling for Circuit Simulation) held in Cambridge, London, Tarragona, Cambridge and Grenoble. The conference will provide a forum for the TFT community to discuss and address the challenges and seek innovative solutions for modelling of new technology TFTs, TFT device and circuit design and system integration.
Call for paper
Draft paper submission deadline：2018-08-31
Call for paper description
The areas of interests include, but are not limited to:
●Processes and physics of new technology TFTs (metal oxide, organic, nanomaterials, and etc)
●Simulation and characterization techniques for TFTs
●Characterization and modeling the impact of processes on the device performance
●Compact TFT device models for circuit simulation
●Model implementation and parameter extraction techniques
●Compact models for interconnects in active matrix flat panels
●TFT circuit design and analysis techniques
●TFT Design for displays and emerging applications