Description

The PMBS18 workshop is concerned with the comparison of high-performance computer systems through performance modeling, benchmarking or through the use of tools such as simulators.

We are particularly interested in research which reports the ability to measure and make tradeoffs in software/hardware co-design to improve sustained application performance. We are also keen to capture the assessment of future systems, for example through work that ensures continued application scalability through peta- and exa-scale systems.

The aim of this workshop is to bring together researchers, from industry and academia, concerned with the qualitative and quantitative evaluation and modeling of high-performance computing systems. Authors are invited to submit novel research in all areas of performance modeling, benchmarking and simulation, and we welcome research that brings together current theory and practice. We recognize that the coverage of the term performance has broadened to include power consumption and reliability, and that performance modeling is practiced through analytical methods and approaches based on software tools and simulators.

Schedule

Session 1: HPC Interconnects
Chair: TBA

9:00 - 9:30
Improving MPI Reduction Performance for Manycore Architectures with OpenMP and Compression
  [abstract] [paper]

Hongzhang Shan, Samuel Williams
Lawrence Berkeley National Laboratory, Berkeley, CA

Calvin W. Johnson
San Diego State University, San Diego, CA

 

9:30 - 10:00
Exploring and Quantifying How Communication Behaviors in Proxies Relate to Real Applications
  [abstract] [paper]

Omar Aazi, Jeanine Cook, Courtenay Vaughan
Sandia National Laboratories, Albuquerque, NM

Jonathan Cook
New Mexico State University, Las Cruces, NM

 

10:00 - 10:30 Coffee Break

Session 2: Machine/Deep Learning
Chair: TBA

10:30 - 11:00
Deep Learning at Scale on NVIDIA V100 Accelerators
  [abstract] [paper]

Rengan Xu, Frank Han, Quy Ta
Dell EMC, Austin, TX

 

11:00 - 11:30
Benchmarking Machine Learning Methods for Performance Modeling of Scientific Applications
  [abstract] [paper]

Preeti Malakar, Prasanna Balaprakash, Venkatram Vishwanath, Vitali Morozov, Kalyan Kumaran
Argonne National Laboratory, Lemont, IL

 

Session 3: Late-breaking Research and Preliminary Techniques
Chair: Steven Wright

11:30 - 11:50
Algorithm Selection of MPI Collectives using Machine Learning Techniques
  [abstract] [paper]

Sascha Hunold
TU Wien, Vienna, Austria

Alexandra Carpen-Amarie
Fraunhofer ITWM, Kaiserslautern, Germany

 

11:50 - 12:10
miniVite: A Graph Analytics Benchmarking Tool for Massively Parallel Systems
  [abstract] [paper]

Sayan Ghosh, Ananth Kalyanaraman, Assefaw H. Gebremedhin
Washington State University, Pullman, WA

Manhantesh Halappanavar, Antonino Tumeo
Pacific Northwest National Laboratory, Richland, WA

 

12:10 - 12:30
Unified Cross-Platform Profiling of Parallel C++ Applications
  [abstract] [paper]

Vladyslav Kucher, Florian Fey, Sergei Gorlatch
University of Muenster, Muenster, Germany

 

12:30 - 14:00 Lunch

Session 4: System Evaluation
Chair: TBA

14:00 - 14:30
A Metric for Evaluating Supercomputer Performance in the Era of Extreme Heterogeneity
  [abstract] [paper]

Brian Austin, Chris Daley, Douglas Doerfler, Jack Deslippe, Brandon Cook, Brian Friesen, Thorsten Kurth, Charlene Yang, Nicholas J. Wright
Lawrence Berkeley National Laboratory, Berkeley, CA

 

14:30 - 15:00
Evaluating SLURM Simulator with Real-Machine SLURM and Vice Versa
  [abstract] [paper]

Ana Jokanovic, Marco D'Amico, Julita Corbalan
Barcelona Supercomputing Center, Barcelona, Spain

 

15:00 - 15:30 Coffee Break

Session 5: Performance
Chair: TBA

15:30 - 16:00
Is Data Placement Optimization Still Relevant On Newer GPUs?
  [abstract] [paper]

Md Abdullah Shahneous Bari
Stony Brook University, Stony Brook, NY

Larisa Stoltzfus
University of Edinburgh, Edinburgh, UK

Pei-Hung Lin, Chunhua Liao, Murali Emani
Lawrence Livermore National Laboratory, Livermore, CA

Barbara Chapman
Stony Brook University, Stony Brook, NY
Brookhaven National Laboratory, Upton, NY

 

16:00 - 16:30
Approximating a Multi-Grid Solver
  [abstract] [paper]

Valentin Le Fèvre
École Normale Supérieure de Lyon, Lyon, France

Leonardo Bautista-Gomez, Osman Unsal, Marc Casas
Barcelona Supercomputing Center, Barcelona, Spain

 

Session 6: Simulation and Prediction
Chair: Stephen Jarvis

16:30 - 17:00
Evaluating the Impact of Spiking Neural Network Traffic on Extreme-Scale Hybrid Systems
  [abstract] [paper]

Noah Wolfe, Mark Plagge, Christopher D. Carothers
Rensselaer Polytechnic Institute, Troy, NY

Misbah Mubarak, Robert B. Ross
Argonne National Laboratory, Lemont, IL

 

17:00 - 17:30
Automated Instruction Stream Throughput Prediction for Intel and AMD Microarchitectures
  [abstract] [paper]

Jan Laukemann, Johannes Hofmann
Friedrich-Alexander-Universität Erlangen-Nürnberg, Erlangen, Germany

Julian Hammer, Georg Hager, Gerhard Wellein
Erlangen Regional Computing Center, Erlangen, Germany

 

Call for paper

Call for paper description

Authors are invited to submit full papers with unpublished, original work. Submissions are limited to 10 pages using 10pt fonts in the IEEE format. The 10-page limit includes figures, tables, and your appendices, but does not include references, for which there is no page limit. Reproducibility initiative dependencies (Artifact Description or Computational Results Analysis) are also not included in the 10-page limit.

A separate Late-Breaking Research and Preliminary Techniques stream is also available for authors to submit 5-page papers describing initial research or early first-of-a-kind results (this page limit does not include references but includes all technical content and figures).

SC Reproducibility Initiative

Authors are asked to provide an artifact description appendix (up to two pages) along with their paper, describing the details of their software environments and computational experiments to the extent that an independent person could replicate their results. More information on the reproducibility initiative can be found here.

All accepted full-length papers (subject to post-review revisions) will be published in the IEEE TCHPC Proceedings.

Authors of selected papers will also be invited to submit revised manuscripts for inclusion in a special issue journal publication (pending).

Author guidelines

  • August 24th 2018 September 3rd 2018 (23:59 AoE) - Full Paper Submissions
  • September 28th 2018 - Full Paper Notifications
  • September 26th 2018 (23:59 AoE) - Late Breaking and Short Paper Submissions
  • October 7th 2018 - Late Breaking and Short Paper Notifications
  • October 7th 2018 - Camera Ready Papers Due
  • November 12th 2018 - PMBS18 Workshop

 

Topics of submission

We encourage submissions in the following areas:

  • Performance modeling, analysis, and prediction of applications and high-performance computing systems
  • Novel techniques and tools for performance evaluation and prediction
  • Advanced simulation techniques and tools
  • Micro-benchmarking, application benchmarking and tracing
  • Performance-driven code optimization and scalability analysis
  • Verification and validation of performance models
  • Benchmarking and performance analysis of novel hardware
  • Performance concerns in software/hardware co-design
  • Tuning and auto-tuning of HPC applications and algorithms
  • Benchmark suites
  • Performance visualization
  • Real-world case studies
  • Studies of manycore architectures such as NVIDIA GPUs

Message

Leave a message

Refresh

Contact information

  • csaliba@computer.org

Sponsored By

  • Simon Hammond, Sandia National Laboratories (NM), US
    Stephen Jarvis, University of Warwick, UK
    Steven Wright, University of York, UK