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Introduction
The first workshop on Neuromorphic Architectures (NeuroArch) aims at exploring novel ideas and research opportunities in design, programming, and application of neuromorphic and brain-inspired accelerators. In the current realm of processor design, where energy and power constraint has shifted the designs toward heterogeneity, hardware neural networks are emerging as candidate accelerators with attractive characteristics and broad application scope. In addition to the power-efficiency and fault tolerance of neural accelerators, we are at the junction of time where: 1. As technology scales down to the atomic levels, the increasing process variability causes the designers to pay a high tax in performance and efficiency to provide fault-free designs; the intrinsic robustness of neural networks may lead to fault-tolerant accelerators. 2. Novel neural network algorithms such as Deep Belief Networks outperform many alternative machine learning algorithms across a broad set of applications. 3. Significant progress in neuroscience sheds light on the operating principles of biological neural networks, which can thus be partially replicated in hardware. 4. The landscape of computing has changed toward providing a more personalized and more targeted experience for the users, thus increasing the importance of applications that require learning. Therefore, we believe it is imperative and timely for the computer architecture community and the design of next generation computing systems to explore and research neural models of computing.
Call for paper

Important date

2014-04-01
Abstract submission deadline

Submission Topics

To this end, NeuroArch invites research papers and talks on topics including but not limited to: · Hardware design for biologically or mathematically inspired neural networks · Applications of hardware neural networks · Advanced technolo
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Important Date
  • Jun 14

    2014

    Conference Date

  • Apr 01 2014

    Abstract Submission Deadline

  • Jun 14 2014

    Registration deadline

Sponsored By
IEEE Computer Society
Association for Computing Machinery Special Interest Group on Computer Architecture - ACM SIGARCH