Introduction
Forum on specification & Design Languages (FDL) is a well established international forum devoted to dissemination of research results, practical experiences and new ideas in the application of specification, design and verification languages to the design, modelling and verification of integrated circuits, complex hardware/software embedded systems, and mixed-technology systems. Modelling and specification concepts push the development of new design and verification methodologies to ESL (Electronic System Level) thus providing a means for model-driven and automated design of complex electronic systems in a variety of application domains. FDL gives an opportunity to gain up-to-date knowledge in many broad areas of the fast evolving field of system design and verification. Through collaboration with the Accellera Systems Initiative FDL maintains a strong link to many EDA standards like SystemC, OCP and IP-XACT.
FDL 2014 is organized by ECSI in technical cooperation with the IEEE Council on Electronic Design Automation (CEDA). The FDL proceedings will be made available online after the conference in the ECSI Resource Center and will be submitted for inclusion into IEEE Xplore.
Call for paper
Important date
2014-05-12
Abstract submission deadline
Submission Topics
Authors are invited to submit manuscripts on topics including, but not limited to:
Formalisms & Languages for …
Requirements and Property specification (RSLs, PSLs, SVA, …)
Multi-physics specification (timing, power, temperature, aging, …)
Multi-domain parallel applications in dynamic real-time environments
Models of computation
Automata (xFSM, …)
Networks (Process Networks, Petri Nets, Task Networks, …)
Platform modelling and abstraction
Transaction level modelling
Run-time system and middleware abstraction
Model and component-based design (UML, SysML, MARTE, …)
Advanced language extensions for SLDLs (SystemC(-AMS), Modelica, …)
Tools & Techniques for efficient …
Formal property checking
Simulation of functional and extra-functional properties
Parallel simulation
High-level hardware and software synthesis
Testbench automation and cCoverage monitoring
Design space exploration and virtual prototyping
Scheduling & real-time analysis
Design Flows & Methodologies covering …
Horizontal and vertical virtual integration testing
Requirements engineering and traceability
Mixed critical embedded applications on multi-core multi-CPU SoCs
Power and performance
Safety and security
Heterogeneous component integration
Multi-objective optimisation
All Comments
Important Date
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Conference Date
Oct 14
2014
toOct 16
2014
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May 12 2014
Abstract Submission Deadline
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Oct 16 2014
Registration deadline
Sponsored By
国际信息处理联合会
Contact Information
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