Introduction

This conference is a forum for researchers and designers to present and discuss various aspects of VLSI design, EDA, embedded systems, and enabling technologies. The program will consist of regular paper sessions, special sessions, embedded tutorials, panel discussions, design contest, industrial exhibits and tutorials. This is the premier conference/exhibition in this area in India, attracting designers, EDA professionals, and EDA tool users. The program committee for the conference has a significant representation from the EDA research community and a large fraction of the papers published in this conference are EDA-related.

In December 1985, a group of about eighty-five delegates assembled on the campus of the Indian Institute of Technology, Chennai to attend the First International Workshop on VLSI Design. The sole purpose of that meeting was to sense the level of VLSI activities in India with a focus on engineering education and research. It started with only 193 Proceedings along with 29 presented papers and just one tutorial.
Since then, the conference has come a long way and has grown equilaterally with the VLSI community and has seen the likes of multinational Industries and academic contributors, from all around the globe. The numbers speak for themselves and have amplified to ten-fold the initial attendees, proceedings, presented papers and tutorials.

Call for paper

Important date

2016-07-24
Abstract submission deadline
2016-07-31
Draft paper submission deadline
2016-09-30
Draft paper acceptance notification
2016-10-31
Final paper submission deadline

Submission Topics

1. DESIGN METHODOLOGIES AND TECHNOLOGY
M1: System-level Design: System-level design methodologies, processor and memory design, multicore systems, GPU design, on-chip communication architectures and networks-on-chip, performance analysis, defect-tolerant architectures, accelerators for emerging workloads (e.g., machine learning)
M2: Advances in Digital Design: Logic and physical synthesis, place and route, clock tree design, physical verification, timing and signal integrity, power integrity, design for manufacturability, design for yield, variation-tolerant design, design challenges for advanced technology nodes
M3: Analog, Mixed-Signal, and RF Design: Design of analog, mixed-signal, and RF IP, high-speed wired and wireless communication interfaces, low-power analog and RF, memory design, standard cell design
M4: Power-Aware Design: Power analysis and estimation, power optimization and low-power design, power-aware and energy-efficient design, thermal management, battery-aware design, energy harvesting
M5: CMOS Technology and Devices: Deep nanoscale CMOS devices, device modeling and simulation, multi-domain simulation, device/circuit-level reliability and variability models
M6: Emerging Technologies: MEMS, CMOS sensors, design methodologies for nanotechnology, post-CMOS devices, biomedical circuits, carbon nanotube-based computing, spintronics, silicon photonics, neuromorphic computing
2. DESIGN TOOLS AND EDA
T1: Design Verification: Functional verification, behavioral and RTL simulation, coverage-driven verification, assertion-based verification, gate-level simulation, emulation, hardware-assisted verification, formal verification, equivalence checking
T2: Test, Reliability, and Fault-Tolerance: DFT, fault modeling and simulation, ATPG, BIST, repair, delay test, fault tolerance, online test, AMS/RF test, board-level and system-level test, silicon debug, post-silicon validation, memory test, reliability testing, defect and fault recoverability
T3: Computer-Aided Design (CAD) tools: Logic and behavioral synthesis, logic mapping, simulation and formal verification, layout (partitioning, placement, routing, floor planning, and compaction)
3. EMBEDDED SYSTEMS DESIGN
E1: Embedded Systems Hardware: Hardware/Software co-design, embedded SoC, embedded multi-core systems, board-level hardware, hardware platforms for Internet-of-Things (IoT) devices
E2: Embedded Systems Software: Embedded operating systems, firmware, middleware, communication software, virtualization, embedded software for security and reliability, embedded applications
E3: FPGA Design and Reconfigurable Systems: Reconfigurable computing, FPGA architecture and FPGA circuit design, CAD for FPGA, FPGA prototyping, FPGA-based accelerators for cloud servers
E4: Wireless Systems: Wireless sensor networks, low-power wireless systems, wireless protocols, wireless power delivery
4. THEME TRACK: TECHNOLOGIES FOR A SECURE AND CONNECTED WORLD
S1: Healthcare Applications
S2: Smart Management of Energy Systems (e.g., Smart Grid)
S3: Intelligent and Secure Transportation Systems
S4: Safety Assurance of Embedded Circuits and Systems
S5: Secure Embedded Circuits and Systems

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Important Date
  • Conference Date

    Jan 07

    2017

    to

    Jan 11

    2017

  • Jul 24 2016

    Abstract Submission Deadline

  • Jul 31 2016

    Draft paper submission deadline

  • Sep 30 2016

    Draft Paper Acceptance Notification

  • Oct 31 2016

    Final Paper Deadline

  • Jan 11 2017

    Registration deadline

Sponsored By
VLSI Society of India
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