8th International Conference on Advanced Power System Automation and Protection (APAP2019)

703 / 2019-04-23 17:29:06

Research and Device Development of Residence Time Testing Technology for Network Acquisition Switch Based on Large Scale FPGA

smart substation,intelligent switch,residence time,FPGA

With the development of smart substation technology, the advantages of intelligent switch networking to transfer SV sample values have been widely recognized. A residence time test technology based on large-scale FPGA is proposed in order to accurately and conveniently test the residence time calibration performance of the intelligent substation dedicated switch. The large-scale FPGA technology is applied to the development of the smart substation network tester according to the IEC61850 communication model and the technical specification of the power dedicated switch. The device enables long-term online monitoring of the performance of the power switch's residence time calibration. The actual test results of the project show that the test device has high reliability and practicability.