Introduction

AboutComponents, Circuits, Devices and Systems; Signal Processing and Analysis
Keywords:electon devices,MOSFETs,Nanotubes,FinFETs,DRAM,Non-volatile memory,Novel materials,Simulation,Innovative circuits,Beyond CMOS.
Scope:The seventh joint EUROSOI-ULIS conference will be hosted by Normandy University in Caen. The focus of the sessions is on advanced nanoscale devices, including SOI technology. Papers in the following areas are solicited:-Physical mechanisms and innovative SOI-like devices.-New channel materials for CMOS: strained Si, strained SOI, SiGe, GeOI, III-V and high mobility materials on insulator; carbon nanotubes; graphene and other two-dimensional materials. -Nanometer scale devices: technology, characterization techniques and evaluation metrics for high performance, low power, low standby power, high frequency and memory applications. -New functionalities in silicon-compatible nanostructures and innovative devices representing the More than Moore domain nanoelectronic sensors, biosensor devices, energy harvesting devices, RF devices, imagers, etc. Advanced test structures and characterization techniques,reliability and variability assessment techniques for new materials and novel devices.
Sponsor Type:1; 9; 9; 9

Committee

STEERING COMMITTEE

Francisco GAMIZ (University of Granada, Spain)
Sorin CRISTOLOVEANU (IMEP-LAHC, France)
Androula NASSIOPOULOU (NCSR Demokritos, Greece) †
Andrei VLADIMIRESCU (ISEP, France)
Joris LACORD (CEA-Leti, France)
Cor CLAEYS (KU-Leuven, Belgium)
Maryline BAWEDIN (IMEP-LAHC, France)
Benjamin INIGUEZ (Universitat Rovira i Virgili, Spain)
Viktor SVERDLOV (TU Wien, Austria)
Francis BALESTRA (IMEP Minatec, France)
Enrico SANGIORGI (University of Bologna, Italy)
Luca SELMI (University of Modena, Italy)
Elena GNANI (University of Bologna, Italy)
Bogdan CRETU (ENSICAEN, France)

TECHNICAL PROGRAM COMMITTEE

Francisco GAMIZ (University of Granada, Spain)
Sorin CRISTOLOVEANU (IMEP-LAHC, France)
Asen ASENOV (University of Glasgow, UK)
Carlos SAMPEDRO (University of Granada, Spain)
Viktor SVERDLOV (TU Wien, Austria)
Luca DONETTI (University of Granada, Spain)
Muhammad ASHRAF ALAM (Purdue University, USA)
Enrico SANGIORGI (University of Bologna, Italy)
Jean-Pierre COLINGE (CEA-Leti, France)
Nadine COLLAERT (IMEC, Belgium)
Gerben DOORNBOS (TSMC, Belgium)
Alexander ZASLAVSKY (Brown University, USA)
Claudio FIEGNA (University of Bologna, Italy)
Gerard GHIBAUDO (IMEP Minatec, France)
Heike E. RIEL (IBM Research Zurich, Switzerland)
Joao Antonio MARTINO (University of Sao Paulo, Brazil)
Stephane MONFRAY (ST Microelectronics, France)
Mikael OSTLING (KTH Royal Institute of Technology, Sweden)
Francis BALESTRA (IMEP Minatec, France)
Max LEMME (RWTH Aachen, Germany)
Pierpaolo PALESTRI (University of Udine, Italy)
Maryline BAWEDIN (IMEP Minatec, France)
Valeriya KILCHYTSKA (Catholic University of Louvain-la-Neuve, Belgium)
Lukas CZORNOMAZ (IBM Research Zurich, Switzerland)
Jordi SUNE (UA Barcelona, Spain)
David LEADLEY (University of Warwick, UK)
Cristell MANEUX (Bordeaux University, France)
Yong Tae KIM (KIST, Korea)
Jean-Pierre RASKIN (Catholic University of Louvain-la-Neuve, Belgium)
Quentin RAFHAY (IMEP Minatec, France)
Luca PIRRO (Global Foundries, Germany)
Elena GNANI (University of Bologna, Italy)
Androula NASSIOPOULOU (NCSR Demokritos, Greece) †
Joris LACORD (CEA-Leti, France)
Bogdan CRETU (ENSICAEN, France)

LOCAL ORGANIZING COMMITTEE

Bogdan CRETU (GREYC-ENSICAEN, France)
Mathieu DENOUAL (GREYC-ENSICAEN, France)
Jean-Marc ROUTOURE(GREYC-UNICAEN, France)
Ulrike LUDERS (CRISMAT-CNRS, France)
Philippe DESCAMPS (IRSEEM-ESIGELEC, France)
Bernadette DOMENGES (CRISMAT-Presto, France)
Virginie DESNOS-CARREAU (GREYC, France)
Sophie RASTELLO (GREYC, France)

Call for paper

Important date

2021-05-17
Abstract submission deadline
2021-06-04
Abstract notification of acceptance
2021-06-28
Draft paper submission deadline

Submission Topics

Papers in the following areas are solicited:

  • Advanced SOI materials and structures; physical mechanisms and innovative SOI-like devices.
  • New channel materials for CMOS: strained Si, strained SOI, SiGe, GeOI, III-V and high mobility materials on insulator; carbon nanotubes; graphene and other twodimensional materials.
  •  Properties of ultra-thin films and buried oxides, defects, interface quality; thin gate dielectrics: high-κ materials for switches and memory.
  • Nanometer scale devices: technology, characterization techniques and evaluation metrics for high performance, low power, reliability, high frequency and memory applications.
  • Alternative transistor architectures including FDSOI, Nanowire, FinFET, MuGFET, vertical MOSFET, FeFET and Tunnel FET, MEMS/NEMS, Beyond-CMOS nanoelectronic devices.
  • New functionalities in silicon-compatible nanostructures and innovative devices representing the More than Moore domain, nanoelectronic sensors, biosensor devices, energy harvesting devices, RF devices, imagers, etc.
  • CMOS scaling perspectives; device/circuit level performance evaluation; switches and memory scaling; three-dimensional integration of devices and circuits, heterogeneous integration.
  • Transport phenomena, compact modeling, device simulation, front- and back-end process simulation.
  • Advanced test structures and characterization techniques, parameter extraction, reliability and variability assessment techniques for new materials and novel devices.

Guidlines

Submission Guidelines

The submission is managed by the Sciencesconf platform. To submit an abstract, you will need to register to the Sciencesconf platform to get a login and account. Just select create account in the login menu on the top right of this webpage and fill the form.

Original 2-page abstracts with illustrations will be accepted for review in pdf format and submitted online on our website.

Papers submitted for review will clearly state: The purpose of the work, How and to what extent it advances the art, Specific new results and their impact.

Only work that has not been previously published at the time of the conference will be considered. Submission of a paper for review and subsequent acceptance is considered by the Committee as an agreement that the work will not be placed in the public domain prior to the conference.

The authors of the accepted contributions will be requested to provide a 4-page extended abstract which will be included in the conference proceedings (with IEEE technical sponsorship and ISBN index) and in the IEEE Xplore® digital library. Outstanding papers will be invited for publication in a special issue of Solid-State Electronics. A best paper award will be attributed by the SINANO institute. A best poster award will be attributed by ELSEVIER.

Submit Comment
Verify Code Change Another
All Comments
Important Date
  • Conference Date

    Sep 01

    2021

    to

    Sep 03

    2021

  • May 17 2021

    Abstract Submission Deadline

  • Jun 04 2021

    Abstract Notification of Acceptance

  • Jun 28 2021

    Draft paper submission deadline

Sponsored By
CNRS IEEE Electron Devices Society SINANO Institute University de Caen Basee Normandie - ENSICAEN
Contact Information
Scan the QR code×