Introduction

The 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD 2016) will be held from the 27th to the 30th of June 2016 in Lisbon, Portugal at the IST Congress Center.

 

SMACD is a forum devoted to Design Methods and Tools for Analog, Mixed-signal, RF (AMS/RF) and multi-domain (MEMs, nanoelectronic, optoelectronic, biological, etc.) integrated circuits and systems. SMACD 2016 is Technically Co-sponsored by IEEE, IEEE CEDA and IEEE CAS. All accepted papers will be published in IEEE Xplore.

Call for paper

Important date

2016-03-04
Draft paper submission deadline
2016-04-15
Draft paper acceptance notification
2016-04-30
Final paper submission deadline

SMACD 2016 topics of interest include, but are not limited, to:

  • Performance modeling
  • Power and thermal modeling
  • Reliability modeling
  • Variability modeling
  • Compact device and circuit modeling
  • Multi-domain modeling (optoelectronics, MEMs, biological, biochemical, etc.)
  • Modeling languages and applications
  • Linear and non-linear model reduction
  • Circuit and system theory and applications
  • Behavioral modeling and simulation
  • Numerical and symbolic simulation methods
  • Distributed and parallel circuit simulation
  • Analysis and simulation techniques for emerging nanoscale devices
  • Analysis of reliability effects: aging, electro-migration, BTI, etc.
  • Simulation and estimation methods of variability and yield
  • Post-CMOS technologies
  • Fault modeling and simulation
  • System-level specification and simulation
  • Novel system-level design flows
  • Innovative design methodologies enabled by behavioral, performance, and/or symbolic modeling techniques
  • Synthesis methods in multi-domain (MEMs, electro-optical, etc.) systems
  • Physical synthesis
  • High-frequency modeling, simulation and design
  • Low-power design techniques
  • Parasitic-aware synthesis
  • Variability-aware and reliability-aware design methodologies
  • Test and design-for-test methods
  • Language-based synthesis techniques
  • Optimization methods applied to circuit and system design: high-level synthesis, structural synthesis, sizing, etc.
  • Emerging electronics
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Important Date
  • Conference Date

    Jun 27

    2016

    to

    Jun 30

    2016

  • Mar 04 2016

    Draft paper submission deadline

  • Apr 15 2016

    Draft Paper Acceptance Notification

  • Apr 30 2016

    Final Paper Deadline

  • Jun 30 2016

    Registration deadline

Sponsored By
IEEE